Masters-Thesis-2 on Pedro Araújo

Published an UVM guide for beginners

Wed, 19 Mar 2014 00:00:00 +0000

The last month and half that I have been studying the UVM methodology, I noticed that of all the guides and tutorials about UVM available throughout the internet, none of them reached to a complete beginner in verification.

Before starting this thesis, my knowledge of verification was very limited, it was narrowed to a simple direct tests, hand-written stimuli, and that was it. It was quite hard to find something that I could start on.

As a result, I started writing a guide that approaches verification with SystemVerilog and UVM from the ground zero. In this guide, it’s explained the most essential features and API of UVM and how can you successfully compile a complete verification environment using SystemVerilog and UVM.

You can find the guide here: http://colorlesscube.com/uvm-guide-for-beginners/

Posted third progress report

Sun, 16 Mar 2014 00:00:00 +0000

The third report can be found here: http://colorlesscube.com/masters-thesis/

I started to develop a verification environment for an I2C bus basing myself on the research I did. I’m also delayed about two weeks compared to the original plan but I expect to keep up with this delay very soon.

In the next few days, the UVM guide I have been writing will be published in this website along with the code for educational purposes.

Posted the second progress report

Fri, 07 Mar 2014 00:00:00 +0000

I posted the second progress report for my thesis in the Master’s Thesis section.

Nothing much to report, just the expected study of some verification concepts that I didn’t have and the completion of the analysis of an existing UVM envinroment used by Synopsys.

You can find the document here: http://colorlesscube.com/masters-thesis/

Updated Master's Thesis section

Sun, 23 Feb 2014 00:00:00 +0000

I’ve added a description of my master’s thesis, as well the work plan for the semester and the preliminary report with some initial research.

I will keep this website updated with sections of my thesis that I will be writing and guides about verification methodologies.